This invention generally pertains to a vertical semiconductor device having a sidewall emitter wherein the emitter is isolated by two dielectric layers in the side wall of a semiconductor region. Generally, in semiconductor devices of this type, it is desirable to have a low capacitance throughout the device because capacitance reduces the speed and performance of the device. Capacitance may be reduced by reducing the area of the interface between the emitter and base and also reducing the doping concentration at the collector-base interface.
At this time, state of the art semiconductor devices of this type generally have an emitter width of approximately 1 micrometer. By reducing this emitter width, the area of the emitter-base interface may be reduced thereby reducing the emitter-base capacitance. Additionally, reduced emitter width will create higher injection efficiency in the emitter and there will be less chance of carrier recombination in the base because the reduced emitter width limits outward diffusion. Therefore, it is desirable to have a semiconductor device comprising a relatively small emitter.